"We selected TCI's clock generator PLL because of its small size, wide frequency range and superior low-jitter performance. This will enable our ASIC customers to successfully implement multiple SPI-4.2 macros in their high-end telecommunication ASICs and help meet the tight jitter and power budgets required for 10 Gbps SONET/SDH systems."

Hideya Horikawa
Senior Design Engineering Manager
Renesas



Our standard licensing agreement does not permit the re-sale of a TCI PLL. However, such terms are available for additional fees.


06 Jul 23 True Circuits Attends 60th Design Automation Conference and Celebrates 25 Years of Timing Excellence!

05 Jul 23 True Circuits Announces Availability of JSPICETM Simulation and Design Environment

08 Jul 22 True Circuits Attends 59th Design Automation Conference

06 Dec 21 True Circuits Introduces New Synthesizable Precision PLL and Synthesizable Micro PLLs and DLLs and Demonstrates Silicon Proven DDR PHY

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